(1996)

Journal Paper

(2009)

1. M.A.Mustafa, S. Itoh, S. Kawahito,“Reduction of random telegraph signal (RTS) noise in CMOS image sensors using histogram analysis,” Journal of Automation, Mobile, Robotics & Intelligent Systems, Vol.3, No.4, pp202-203,2009.

2. Suhaidi Shafie,Shoji Kawahito,Izhal Abdul halin,Wan Zuha Wan Hasan, “Non-linearity in wide dynamic range CMOS image sensors utilizing a partial charge transfer technique,” Sensors2009,vol.9,no.12,pp9452-9467, Dec.2009.

3. T. Sawada, K. Itoh, M. Nakayama, S. Kawahito, “A range-shift technique for TOF range image sensors,” IEEJ Trans. Sensors and Micromachines, vol. 129, no. 11, pp. 421-425, 2009.

4. J. H. Park, S. Aoyama, T. Watanabe, K. Isobe, S. Kawahito, “A high- speed low-noise CMOS image sensor with 13-b column-parallel single-ended cyclic ADCs,” IEEE Trans. Electron Devices, vol. 56, no. 11, pp. 2414-2422, 2009.

5. K. Yasutomi, S. Itoh, S. Kawahito, “A high-speed CMOS image sensor with global electronic shutter pixels using pinned diodes,” IEEJ Trans. Sensors and Micromachines, vol. 129,no. 10, pp. 321-327, 2009.

6. H. J. Yoon, S. Itoh, S. Kawahito, “A CMOS image sensor with in-pixel two-stage charge transfer for fluorescence lifetime imaging,” IEEE Trans. Electron Devices, vol. 56, no. 2, pp. 214-221, 2009.

(2008)

7. S. Shafie, S. Kawahito, H. J. Yoon, S. Itoh, “ A Dynamic Range Expansion Technique Using Dual Charge Storage in a CMOS APS and Multiple Exposures for Reduced Motion Blur, J. Inst. Image Inf. TV Eng., vol.62, no.12, pp. 2037, 2008

8. M. Uno, S. Kawahito, An offset compensated class-AB sample-and-hold amplifier using two sampling capacitors, IEICE Electronics Express, vol. 5, no. 22 pp.962-966 (2008).

9. S. Kawahito, “Techniques for digitally assisted pipeline A/D converters,” IEICE Trans. Electron., vol. E91-C, no.6, pp.892-836, June 2008 (Invited Paper).

10. S. Shafie, S. Kawahito, S. Itoh, “A Dynamic Range Expansion Technique for CMOS Image Sensors with Dual Charge Storage in a Pixel and Multiple Sampling”, MDPI Sensors Journal, vol. 8, pp.1915-1926, Mar.2008.

(2007)

11. M. Furuta, S. Kawahito, D. Miyazaki, “A Digital-Calibration Technique for Redundant Radix-4 Pipelined Analog-to-Digital Converters”, IEEE Trans. Instrumentation and Measurement, vol.56, no.6, pp.2301-2311, Dec.2007

12. S. Kawahito, I. A. Halin, T. Ushinaga, T. Sawada, M. Homma, Y. Maeda, “A CMOS Time-of-Flight Range Image Sensor With Gates-on-Field-Oxide Structure”, IEEE Sensors Journal, vol.7, no.12, pp.1578-1586, Dec.2007.

13. S. Kawahito, “CMOS imaging devices for new markets of vision systems”, IEICE Trans. Electron., vol.E90-C, no.10, pp.1858-1868, Oct.2007 (Invited paper)

14. M. Yamaguchi, S. Koya, H. Torizuka, S. Aoyama, S. Kawahito, “Shielded-Loop Type On-Chip Magnetic Field Probe to Evaluate Radiated Emission from Thin-Film Noise Shutter”, IEEE Transactions on Magnetics, vol. 43, No. 6, pp. 2370-2372, June 2007.

15. M. Furuta, Y. Nishikawa, T. Inoue, S. Kawahito, “A High-Speed, High-Sensitivity Digital CMOS Image Sensor With a Global Shutter and 12-bit Column-Parallel Cyclic A/D Converter”, IEEE J. Solid-State Circuits, vol.42, no.4, pp.766-774, Apr.2007.

16. K. Honda, M. Furuta, S.Kawahito, “A Low-Power Low-Voltage 10-bit 100-Msample/s Pipeline A/D Converter Using Capacitance Coupling Techniques”, IEEE J. Solid-State Circuits, vol.42, no.4, pp.757-765, Apr.2007.

17. Y. Nishikawa, S. Kawahito, M. Furuta, T. Tamura, “Design of Parallel Image Compression Circuits for High-speed CMOS Image Sensors”, J. Inst. Image Inf. TV Eng., vol.61, no.3, pp.369-377, Mar.2007.

18. J. H. Park, S. Kawahito, M. Furuta, M. Sasaki, Y. Wakamori, M. Mase, Y. Ohta, “A Wide Dynamic Range CMOS Image Sensor with Improved 12-bit Column Parallel Cyclic ADCs”, J. Inst. Image Inf. TV Eng., vol.61, no.3, pp.360-368, Mar.2007.

19. S. Itoh, S. Kawahito, “A low-power transmitter design for inductive data link with class-F switching operation, “ IEICE Electronics Express, vol. 4, no. 2, pp.42-47, 2007.

20. M. Sasaki, M. Mase, S. Kawahito, Y. Tadokoro, “A Wide-Dynamic-Range CMOS Image Sensor Based on Multiple Short Exposure-Time Readout With Multiple-Resolution Column-Parallel ADC”, IEEE Sensors Journal, vol.7, no.1, pp.151-158, Jan.2007.

(2006)

21. S. Kawahito, “CMOS Image Sensors-Camera-on-a-Chip-“, J. IEICE, vol.89, no.10, pp.871-875, Oct.2006 (in Japanese).

22. S. Aoyama, S. Kawahito, M. Yamaguchi, “An Active Magnetic Probe Array for the Multiple-point Concurrent Measurement of Electromagnetic Emissions”, IEEE Trans. Magnetics, vol.42, no.10, pp.3303-3305, Oct.2006.

23. S.Aoyama, S.Kawahito, M.Yamaguchi, “Integrated Active Magnetic Probe in SOI-CMOS Technology”, Japanese J. Applied Physics, vol.45, Part1, no.9A, pp.6878-6883, Sep.2006.

24. T. Eki, S. Kawahito, Y. Tadokoro, “An On-Sensor Bit-Serial Column-Parallel Processing Architecture for High-Speed Discrete Fourier Transform”, IEEE Trans. Circuits and Systems II: Express Briefs, vol.53, no.8, pp.642-646, Aug.2006.

25. K. Nakano, T. Takahashi, S. Kawahito, “Sensor array characteristics of MOS Hall-plates and the conparison with split-drain MAGFETs”, IEICE Electronics Express, vol.3, no.13, pp.328-332, Jul.2006.

26. K. Nakano, T. Takahashi, S. Kawahito, “Improving Temperature-Stability of CMOS Rotary Encoders Using a Parallel-Connected MAGFET Array”, IEEJ Trans. Sensors and Micromachines, vol.126, no.7, pp.312-317, Jul.2006.

27. S. Itoh, S. Kawahito, S. Terakawa, “A CMOS One-chip Wireless Camera with Digital Image Transmission Function for Capsule Endoscope”, IEEJ Trans. Sensors and Micromachines, vol.126, no.7, pp.318-324, Jul.2006.

28. N. Kawai, S. Kawahito, “Measurement of Low-Noise Column Readout Circuits for CMOS Image Sensors”, IEEE Trans. Electron Devices, vol.53, no.7, pp.1737-1739, Jul.2006.

29. M. Uno, S. Kawahito, “Design of a Small-Offset 12-Bit CMOS DAC Using Weighted Mean Sample-and-Hold Circuit”, IEICE Trans. Electron, vol.E89-C, no.6, pp.702-709, Jun.2006.

30. Z. Liu, M. Furuta, S. Kawahito, “Simultaneous Compensation of RC Mismatch and Clock Skew in Time-Interleaved S/H Circuits”, IEICE Trans. Electron, vol.E89-C, no.6, pp.710-716, Jun.2006.

(2005)

31. M. Mase, S. Kawahito, M. Sasaki, Y. Wakamori, M. Furuta, “A Wide Dynamic Range CMOS Image Sensor With Multiple Exposure-Time Signal Outputs and 12-bit Column-Parallel Cyclic A/D Converters”, IEEE J. Solid-State Circuits, vol.40 no.12 pp.2787-2795, Dec. 2005.

32. J. H. Park, S. Kawahito, Y. Wakamori, “A new active pixel structure with a pinned photodiode for wide dynamic range image sensors”, IEICE Electronics Express, vol.2, no.18, pp.482-487, Sep. 2005.

33. M. Furuta, S. Kawahito, H. Okada, “A programmable gain amplifier with color balancing for CCD image sensors”, IEE Proc. Circuits and Systems, vol. 152, no. 3, pp.229-235, Jun. 2005.

34. M. Sakakibara, S. Kawahito, D. Handoko, N. Nakamura, H. Satoh, M. Higashi, K. Mabuchi, H. Sumi, “A high-sensitivity CMOS image sensor with gain-adaptive column amplifiers”, IEEE J. Solid-State Circuits, vol. 40, no. 5, pp. 1147-1156, 2005.

35. K. Nakano, T. Takahashi, S. Kawahito, “A CMOS Rotary Encoder Using Magnetic Sensor Arrays”, IEEE Sensors Journal, vol.5, no.5 pp.889-894, May 2005.

36. K. Nakano, T. Takahashi, S. Kawahito, “Angle detection method for CMOS smart rotary encoder”, J. Robotics and Mechatronics, vol.17 no.4　pp.469-474, Apr. 2005.

37. S. Kawahito, K. Honda, N. Kawai, F. Furuta, D. Miyazaki, “Low-power design of high-speed A/D converters, IEICE Trans. Electronics”, vol. E88-C, no. 4, pp. 468-478, Apr. 2005. (Invited paper)

38. N. Kawai, S. Kawahito, “Effectiveness of a correlated multiple sampling differential averager for 1/f noise, IEICE Electronics Express”, vol. 2, no. 13, pp.379-383, 2005.

(2004)

39. I. A. Halin, S. Kawahito, “A CMOS time-of-flight range image sensor using charge domain operations”, IEICE Trans. Electronics, vol. E87-C, no. 11, pp.1889-1896, Nov. 2004.

40. N. Kawai, S. Kawahito, “Noise analysis of high-gain low-noise column readout circuits for CMOS image sensors”, IEEE Trans. Electron Devices, vol.51, no.2, pp.185-194, 2004.

(2003)

1. H. Takao, R. Asaoka, K. Sawada, S. Kawahito, M. Ishida, Trans, “A JFET-CMOS technology for low-noise sensor interface circuits”, IEEJ Trans. Sensors and Micromachines, vol.123, no.10, pp. 422-428, Oct. 2003.

2. S. Kawahito, A. Cerman, K. Aramaki, Y. Tadokoro, “A weak magnetic field measurement system using micro-fluxgate sensors and delta-sigma interface”, IEEE Trans. Inst. Meas. vol. 52, no. 1, pp. 103-110, Feb. 2003.

3. D. Miyazaki, S. Kawahito, M. Furuta, “A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudo differential architecture”, IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 369-373, Feb. 2003.

(2002)

4. M. Furuta, S. Kawahito, D. Miyazaki, “A digital calibration technique of capacitor mismatch for pipelined analog-to-digital converters”, IEICE Trans. Electronics, vol. E85-C, no. 8, pp.1562-1568, 2002.

5. S. Kawahito, D. Handoko, Y. Tadokoro, A. Matsuzawa, “Low-power motion vector estimation using iterative search block matching methods and a high-speed non-destructive CMOS image sensor”, IEEE Trans. Circuits and Systems for Video Technology, vol. 12, no. 12, pp.1084-1092, Dec. 2002.

6. S. Kawahito, K. Sawada, K. Tada, M. Ishida, Y. Tadokoro, “An improved image reconstruction method for a chopperless infrared image sensor”, Trans. IEEJ Trans. Sensors and Micromachines, vol. 122-E, no. 3, pp.166-171, 2002.

7. S. Kawahito, K. Sawada et al., “Active pixel circuits and signal processing techniques for a chopperless pyroelectric infrared image sensor”, Sensors and Actuators A, vol. 97-98C, pp. 182-190, 2002.

(2001)

8. M. Sasaki, S. Kawahito, Y. Tadokoro,” A method for integrating gamma correction and gain control functions using a logarithmic compression CMOS image sensor,” IEEJ Trans. Sensors Micromachines, Vol. 121-C, No. 8, pp. 1312-1317 (2001.8)(in Japanese).

9. P. Ripka, S. O. Choi, A. Tipek, S. Kawahito, M. Ishida, “Pulse excitation of microfluxgate sensors”, IEEE Trans. Magnetics, vol. 37, no. 4, pp. 1998-2000, June 2001.

10. P. Ripka, S. O. Choi, A. Tipek, S. Kawahito, M. Ishida, “Symmetrical core improves micro-fluxgate sensors, Sensors and Actuators”, vol. A92, pp. 30-36, 2001.

11. Y. Matsumoto, S. Kawahito, M. Ishida, “Development and evaluation of capacitance detection ASIC for three-axis common electrode type capacitive accelerometer”, IEEJ Trans. Sensors and Micromachines, vol. 121, no. 3, pp. 135-141, March 2001.

12. P. Ripka, S. Kawahito, S.O. Choi, A. Tipek, M. Ishida, “Micro-fluxgate sensor with closed core”, Sensors and Actuators, vol. A91, pp. 65-69, Feb. 2001.

13. D. Handoko, S. Kawahito, Y. Tadokoro and A. Matsuzawa,” A CMOS high-speed non-destructive intermediate image sensor,“ J. Inst. Image Inf. TV Eng.,, Vol.55,No.2,pp.264-270(2001.2) (in Japanese).

14. D. Handoko, S. Kawahito, Y. Tadokoro, A. Matsuzawa, “A Bidirectional Multiple Charge Transfer Active Pixel Image Sensor for Low-Power Focal Plane Motion Vector Estimation”, IEEJ Trans. Sensors and Micromachines, vol.121-E, no. 1, pp. 1-7, Jan. 2001.

(2000)

15. D. Miyazaki, S. Kawahito, “Low-power area efficient design of embedded high-speed A/D converters”, IEICE Trans. Electronics, vol. E83C, no. 11, pp.1724-1732, Nov. 2000.

16. D. Handoko, S. Kawahito, M. Kumahara, N. Kawai, Y. Tadokoro, M. Katayama, A. Matsuzawa, “A CMOS Image Sensor with Non-Destructive High-Speed Imaging Mode and its Applications”, J. Robotics and Mechatoronics, vol.12, no.5, pp.502-507, Oct. 2000.

17. K. Sawada, S. Kawahito, K. Tada, Y. Tadokoro, A. Ishida, “A proposal of a chopperless highly sensitive pyroelectric type infrared imager,”," J. Inst. Image Inf. TV Eng., Vol.54, No. 2, pp. 282-285 (2000.2)(in Japanese).

18. M. Sasaki, S. Kawahito, Y. Tadokoro, "A cancellation method of fixed pattern noise in logarithmic response CMOS image sensors,“ J. Inst. Image Inf. TV Eng., Vol.54, No. 2, pp. 286-289 (2000.2) (in Japanese).

19. Dwi Handoko, S. Kawahito,” A low-power A/D conversion technique for high-speed non-destructive image sensor,“ J. Inst. Image Inf. TV Eng., Vol.54, No. 2, pp. 290-293 (2000.2)(in Japanese).

(1999)

20. S. Kawahito, C. Maier, M. Schneider, M. Zimmermann, H. Baltes, “2-D CMOS microfluxgate sensor system for digital detection of weak magnetic fields”, IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1843-1851, 1999.

21. D. Handoko, S. Kawahito, Y. Tadokoro, A. Matsuzawa, “On sensor motion vector estimation with iterative block matching and non-destructive image sensing”, IEICE Trans. Electronics, vol. E82-C, no. 9, pp. 1755-1763, 1999.

22. S. Kawahito, J. Naka, Y. Tadokoro, “A low-power A/D conversion technique using correlation of moving pictures”, IEICE Trans. Electronics, vol. E82-C, no. 9, pp. 1764-1771, 1999.

23. S. Kawahito, A. Koll, C. Hagleitner, H. Baltes, Y. Tadokoro, “Delta-sigma modulation sensor interface circuits with improved conversion gain for capacitive readout chemical sensors”, IEEJ Trans. Sensors and Micromachines, vol. 119-E, no. 3, pp. 138-142, 1999.

24. D. Miyazaki, S. Kawahito, Y. Tadokoro, “Low-power area-efficient pipelined A/D converter design using a single-ended amplifier”, IEICE Trans. Fundamentals, vol. E82-A, no. 2, pp. 203-300, 1999.

(1998)

25. S. Kawahito, “Prospects of CMOS image sensors integrating computational functions,” Oyo Buturi, Vol.67, No.1, pp.39-43,Jan.1998 (invited paper, in Japanese).

26. M. Sasaki, S. Kawahito, Y. Tadokoro,” A method for integration of gamma correction and gain control circuits on a CMOS image sensor, J. Inst. Image Inf. TV Eng.,Vol. 52, No.2, pp. 214-216, Feb. 1998 (in Japanese).

27. S. Kawahito, M. Yosihda, M. Sasaki, K. Umehara, D. Miyazaki, Y. Tadokoro, K. Murata, S. Doushou and A. Matsuzawa, "A CMOS image sensor for focal-plane compression using analog 2-D DCT circuits and an adaptive resolution A/D converter,” J. Inst. Image Inf. TV Eng., Vol. 52, No. 2, pp. 214-216, Feb. 1998 (in Japanese).

(1997)

28. S. Kawahito, M. Yosihda, M. Sasaki, K. Umehara, D. Miyazaki, Y. Tadokoro, K. Murata, S. Doushou, A. Matsuzawa, “A CMOS image sensor with analog two-dimensional DCT-based compression circuits for one-chip camera”, IEEE J. Solid-State Circuits, vol.32, no.12, pp.2030-2041, Dec.1997.

29. S. Choi, S. Kawahito, K. Tahashi, Y. matsumoto, M. Ishida, Y. Tadokoro, “A planar fluxgate magnetic sensor for on-chip integration”, Sensors and Materials, vol.9, no.4, pp.241-252, 1997.

30. S. Kawahito, M. Yoshida, Y. Tadokoro, A. Matsuzawa, “An analog two-dimensional discrete cosine transform processors for focal-plane image compression”, IEICE Trans. Fundamentals, vol.E80-A, no.2, pp.283-290, Feb.1997.

31. S. Koga, A. Yamasawa, S. Kawahito, Y. Tadokoro, K. Mizuno, O. Tabata, “Micro fluxgate magnetic sensor interface circuits using delta-sigma modulation”, Trans. IEE of Japan, vol.117E, no.2, pp.84-88, Feb. 1997.

32. K. Harada, S. Kawahito, Y. Tadokoro," A counting system of the chewing number using pressure sensors," Trans. SICE," Vol. 33, No. 1, pp.1-7, Jan. 1997 (in Japanese).

(1996)

33. S. Choi, S. Kawahito, Y. Matsumoto, M. Ishida, Y. Tadokoro, “An integrated micro fluxgate magnetic sensor”, Sensors and Actuators A, vol.55, pp.121-126, 1996.

34. S. Kawahito, Y. Tadokoro, “CMOS class-AB current mirrors for precision current-mode analog signal processing elements”, IEEE Trans. Circuits and Systems, vol.43, no.12, pp.843- 845, Dec. 1996.

35. S. Kawahito, M. Sutoh, A. Yamasawa, Y. Tadokoro, “Micro fluxgate magnetic sensors using planar coils wrapped around a film core”, Trans. IEE of Japan, vol.116E, no.10, pp.413-421, Oct. 1996.

36. S. Kawahito, Y. Sugiyama, “Micro magnetic Sensors”, IEEJ Trans. C, vol.116, no.8, pp. 887-889, Aug.1996.

37. Y. Matsumoto, K. Kawai, T. Terada, S. Kawahito, M. Ishida, and T. Nakamura," A magnetic sensor with silicon on insulator structure for high temperature applications," Trans. of IEE, Vol.116E, No.8, pp.317-324, August 1996 (in Japanese).

38. S. Kawahito, H. Satoh, M. Sutoh, Y. Tadokoro, “High-resolution micro-fluxgate sensing elements using closely-coupled coil structures”, Sensors and Actuators A, vol.54, pp.612-617, 1996.

39. S. Kawahito, K. Hayakawa, Y. Matsumoto, M. Ishida, Y. Tadokoro, “An integrated MOS magnetic sensor with chopper-stabilized amplifier”, Sensors and Materials, vol.8, no.1, pp. 1-12, 1996.

(1995)

(1994)

40. S. Kawahito, K. Takeda, T. Nishimura, Y. Tadokoro, “A discrete Fourier analyzer based on analog VLSI technology”, IEICE Trans. Electron., vol.E77-C, no. 7, pp.1049-1056, July 1994.

41. S. Kawahito, Y. Sasaki, H. Sato, T. Nakamura, Y. Tadokoro, “A fluxgate magnetic sensor with micro-solenoids and electro-plated permalloy cores”, Sensors and Actuators A, vol.43, pp.128-134, 1994.

42. S. Kawahito, Y. Sasaki, H. Sato, S. O. Choi, T. Nakamura, Y. Tadokoro, “A miniature fluxgate sensing element for high-performance integrated silicon magnetic sensors”, Sensors and Materials, vol.5, no.5, pp.241-251, 1994.

43. S. Kawahito, S. Ueda, M. Ishida, T. Nakamura, S. Usui, S. Nagaoka, “A CMOS integrated circuit for multichannel multiple-subject biotelemetry using bidirectional optical communications”, IEEE Trans. Biomedical Eng., vol.41, no.4, pp.400-406, April 1994.

44. S. Kawahito, S.O. Choi, M. Ishida, T. Nakamura, “Micromachined Hall elements for two-dimensional magnetic field sensing”, Sensors and Actuators A, vol.40, pp.141-146, 1994.

45. S. Kawahito, M. Ishida, T. Nakamura, M. Kameyama, T. Higuchi, “High-speed area- efficient multiplier design using multiple-valued current-mode circuits”, IEEE Trans. Computers, vol.43, no.1, pp.34-42, Jan.1994.

(1993)

46. S. Kawahito, M. Ishida, T. Nakamura, K. Mizuno, M. Kameyama, T. Higuchi, “Multiple-valued current-mode parallel multiplier based on redundant positive-digit number representations”, Systems and Computers in Japan, vol.24, no.5, May 1993.

47. S. Kawahito, Y. Mitsui, M. Ishida, T. Nakamura, “VLSI-oriented multiple-valued current- mode arithmetic circuits using redundant number representations”, IEICE Trans. Electron. vol.E76-C, no.3, pp.446-454, March 1993.

(1992)

48. S. Kawahito, K. Mizuno, M. Ishida, T. Nakamura, M. Kameyama, and T. Higuchi," Multiple-valued current-mode parallel multiplier based on redundant positive-digit number representations, "Trans. of IEICE, Vol.J75-D-I, No.5, pp.270-279, May 1992 (in Japanese).

(1991)

49. G. S. Chung, S. Kawahito, M. Ishida, T. Nakamura, “High-resolution pressure sensors fabricated by silicon wafer direct bonding”, IEE Electronics Letters, vol.27, pp.1098-1099, 1991.

50. G. S. Chung, S. Kawahito, M. Ishida, M. Kawashima, T. Nakamura, “Applications of Si-wafer direct bonding to high-temperature integrated pressure sensors”, Sensors and Materials, vol.3, pp. 61-74, 1991.

51. G. S. Chung, S. Kawahito, M. Ishida, T. Suzaki, T. Nakamura, “Temperature-independent pressure sensors using epitaxially stacked Si/Al2O3/Si structures”, Sensors and Actuators, vol.29, pp.107-115, 1991.

52. G.S. Chung, S. Kawahito, M. Ishida, T. Suzaki, T. Nakamura, “Novel pressure sensors using epitaxially stacked Si/Al2O3/Si structures for high-precision control of silicon diaphragms”, Jpn. J. Appl. Phys., vol.30, pp.1378-1383, 1991.

53. N. Karita, S. Kawahito, M. Ishida, S. Nagaoka, S. Usui, T. Nakamura, “A wide dynamic range optical receiver for biotelemetry system”, IEICE Trans., vol.E74, no.5, pp.1343-1344, May 1991.

54. G.S. Chung, S. Kawahito, M. Ishida, T. Nakamura, M. Kawashima, T. Suzaki, “High-performance pressure sensors using double silicon-on-insulator structures”, Rev. Sci. Inst., vol. 62, no. 5, pp.1341-1346, May 1991.

55. N. Karita, S. Kawahito, S. Kuragaki, S. Usui, and T. Nakamura, "CMOS optical receiver for indirect light telemetry," Trans. of IEICE, Vol.J74-D-II, No.4, pp.550-559, April 1991 (in Japanese).

56. N. Karita, S. Kawahito, M. Ishida, M. NIshikado, S. Nagaoka, S. Usui and T. Nakamura, "Implementation and design of biosignal optical telemetry system based on enforced synchronization," Trans. of IEICE, Vol.J74-D-II, No.4,pp.550-559, April 1991 (in Japanese).

(1990)

57. G. S. Chung, S. Kawahito, M. Ishida, T. Nakamura, “Novel pressure sensors with multilayer SOI structures”, IEE Electronics Lett., vol.26, no.12, pp.775-776, June 1990.

58. S. Kawahito, M. Ishida, T. Nakamura, “Analogue MOS current-mode circuits for three-dimensional integrated smart image sensor”, IEE Electronics Lett., vol.26, no.3, pp.177-179, Feb. 1990.

59. S. Kawahito, M. Kameyama, T. Higuchi, “Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems”, IEEE J. Solid-State Circuits, vol.25, no.1, pp.125-131, Feb. 1990.

(1989)

60. S. Kawahito, M. Kameyama, T. Higuchi," A high-performance multiple-valued multiplier using bidirectional current-mode MOS technology," Trans. of IEICE, Vol. J72-C-II, No.5, pp.434-441, May 1989 (in Japanese).

(1988)

61. M. Kameyama, S. Kawahito, T. Higuchi, “A multiplier chip with multiple-valued bidirectional current-mode logic　circuits, IEEE Computer”, vol.21, no.4, pp.43-56, April 1988.

62. M. Kameyama, S. Kawahito, and T. Higuchi, "Bidirectional current-mode circuits for the multiple-valued Signed-Digit arithmetic and their applications," Trans. of IEICE,Vol. J71-D, No.7, pp.1189-1198, July 1988 (in Japanese).

63. S. Kawahito, M. Kameyama, T. Higuchi, H. Yamada, “A 32 x 32 bit multiplier using multiple-valued MOS current-mode circuits”, IEEE J. Solid-State Circuits, vol.SC-23, no.1, pp.124-132, Feb. 1988.

(1987)

64. S. Kawahito, M. Kameyama, T. Higuchi, “Design of VLSI-oriented radix-4 signed-digit arithmetic circuits using multiple-valued logic”, Systems and Computers in Japan, vol.18, no.4, April 1987.

(1986)

65. S. Kawahito, M. Kameyama, and T. Higuchi,"Design of VLSI-oriented radix-4 Signed-Digit arithmetic circuits based on multiple-valued logic," Trans. of IEICE, Vol. J69-D, No.5, pp.679-689, May 1986 (in Japanese).

(1985)

66. S. Kawahito, N. Karita, M. Ishida, T. Nakamura, S. Usui, K. Maenaka, Y. Yasuda, Y. Yoshida," An integrated CMOS digital filter", Trans. of IEICE, Vol.J68-C, No.11, pp.965-967, Nov. 1985 (in Japanese).